1. Field
Embodiments discussed herein relate to a design supporting method of calculating a delay time of a semiconductor integrated circuit.
2. Description of the Related Art
In a semiconductor integrated circuit (LSI), a timing margin of a signal is reduced and hence timings are verified by taking a signal propagation delay time into consideration upon designing the LSI. A delay occurs in signal propagation depending on three factors: a process (P), a temperature (T) and a supply voltage (V).
Related art is disclosed in International Publication WO2003/060776.